PLX Technology Adopts Cadence Incisive Palladium II Accelerator/Emulator for Full System Verification Easy Deployment, Early “Bug” Detection and Robust Portfolio of Verification IP Improve Produ
2008-04-02 05:00:00
PLX Technology Adopts Cadence Incisive Palladium II Accelerator/Emulator for Full System Verification
Easy Deployment, Early “Bug” Detection and Robust Portfolio of Verification IP Improve Produ
SAN JOSE, CA–( EMWNews – April 2, 2008) – Cadence Design Systems, Inc. (
the leader in global electronic-design innovation, today announced that PLX
Technology, the world’s leading supplier of PCI Express® switch and
bridge silicon for the communications, server, storage and embedded
Cadence® Incisive® Palladium® II Accelerator/Emulator for its
advanced system-level verification needs. PLX® cited the ease of use of
the Palladium II system, a robust portfolio of Cadence® SpeedBridge®
Adapters, and megahertz runtime performance as key advantages in their
design flow. By implementing the Palladium II system with host and device
PCI Express 2.0 SpeedBridge Adapters, PLX created an extremely robust
environment that significantly enhanced previous FPGA-based approaches
while improving system-level quality and scheduling predictability.
With a critical need to deliver system-level quality under tight schedules,
PLX chose the Palladium II system approach over other verification methods. The
realistic in-circuit verification environment offered a fast bring-up time
to find bugs earlier in the product design cycle, and offered a different
class of system interoperability and coverage when compared with
traditional simulation environments.
“We can’t afford to run into bugs late in the design cycle that could
possibly lead to costly schedule slips,” said Vijay Meduri, director of
design engineering, PLX Technology. “With the Palladium II system we’ve
been able to add significantly more stress on our design versus simulation
or FPGA platforms, and add much higher levels of functional coverage to
verify our latest multi-million gate designs and stay on schedule.”
The Palladium II series of accelerators/emulators provides the industry’s
highest throughput for verification and validation of complex hardware,
software and full systems in the wireless, graphics, networking and
consumer markets. When in the emulation mode or when regression testing
with an embedded testbench, the system delivers up to 10,000 times the
average performance of other simulators by incorporating peripherals,
embedded processors, multiple ASICs, embedded software, and real-world
data.
“We’re excited that PLX Technology chose the Palladium II system for its
most critical system-level verification needs,” said Michael Young,
director of product marketing, Cadence Design Systems. “Our team is pleased
to work closely with PLX to ensure that they continue to deliver
high-quality interconnect products and get them to market faster.”
About Cadence
Cadence enables global electronic-design innovation and plays an essential
role in the creation of today’s integrated circuits and electronics.
Customers use Cadence software and hardware, methodologies, and services to
design and verify advanced semiconductors, consumer electronics, networking
and telecommunications equipment, and computer systems. Cadence reported
2007 revenues of approximately $1.6 billion, and has approximately 5,300
employees. The company is headquartered in San Jose, Calif., with sales
offices, design centers, and research facilities around the world to serve
the global electronics industry. More information about the company, its
products, and services is available at www.cadence.com.
Cadence, Incisive, Palladium and SpeedBridge are registered trademarks, and
the Cadence logo is a trademark of Cadence Design Systems, Inc. in the U.S.
and other countries. All other marks are properties of their respective
holders.
For more information, please contact: Doron Aronson Cadence Design Systems, Inc. 408-428-4404 [email protected] |
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